The Raphael / Zen 4 chiplet will also go to powerful notebooks

In recent days, another batch of information about core processors has gathered Zen 4, namely about its chiplet version Raphael. So far we have talked about these products as desktop, but it seems to be in the case of a number Raphael it would be somewhat narrowing. At least that’s what a batch of slides the Games Nexus got in March 202 suggests0. This does not necessarily mean that they come from March 2020, at least some of this information will be older. Some data may no longer be (and probably isn’t) up to date, but we’re still learning a lot:

AMD (at least at the time of writing) planned to deploy Raphael in the desktop for TDP in the range of 45-105 watts. This in itself is not surprising (there are now reports that the TDP of desktop models could be expanded to up to 125 watts for 16-core models and a special line with more than 16 cores with a TDP of up to 170 watts could emerge). More interesting is the deployment of these chip processors in the mobile segment.

Previous chiplet (Ry) women used AMD only in the desktop, because the GMI interfaces connecting the chiplets have some self-consumption and in terms of energy requirements it was more advantageous to deploy monolithic APUs in notebooks. However, it seems that we are slowly getting to the stage where chiplets will find application in notebooks, with Raphael, specifically in the 35-65W segment. What can it be given to? Probably three facts. Firstly, the transition of processor chiplets to 5nm process (which reduces consumption), secondly, the transition of central chiplets from 12nm to 7 / 6nm process (which also reduces consumption) and finally the deployment of 3rd generation GMI, which will probably have higher energy efficiency (GB / W) than the current version. In such a situation, of course, the presence of integrated graphics is required.

That would Raphael could be optionally equipped with integrated graphics (RDNA 2) we have known for quite some time, but here we have for the first time black on white (or rather salmon on gray) that this graphics will be part of the central chiplet (not a separate chiplet). A novelty at the level of the central chiplet is also the DCN (Display Core Next, display pipeline) and the new SMU (System Management Unit). It is also worth noting that the controller supports both DDR5 and DDR4 (recent leaks only spoke of DDR5).

The third of the slides, the color chart of the platform, is quite a nut. Unlike all other materials, it speaks of a processor Raphael supporting DDR4 memory and AM4 socket. For now, we can only speculate whether it should have been Raphael originally intended for the AM4 platform, or (rather) AMD planned for some time Raphael both for AM5 and in the version for socket AM4. If so, then it is probably no longer the current intention, because among the information leaked in the last year was not about the AM4 version Raphaelu only mention.

Further clarification was provided by the ExecutableFix leaker, which recently released a processor case render Raphael. He supplemented these pictures with detailed renderings that explain why the edges of the IHS are bitten: They are used for capacitors:

However, it can be expected that the case designed in this way will be designed exclusively for the AM4 / desktop socket and will result in some thin design with a BGA interface in notebooks.

Processors Raphael with cores Zen 4 are expected in the second half of next year, according to some sources, from October to November. They will bring more than a 20% increase in IPC over Zen 3 (the first samples achieved about a 22% increase), a 5nm production process increasing energy efficiency and, if necessary, a special edition supporting more than 16 cores can be created. It will be the first generation of Ryzens with the support of a new socket (AM5) and DDR5 memory, which in the first generation increases memory throughput by 50% (DDR5-4800). The presence of integrated graphics is possible, but it will probably not achieve the same performance as graphics integrated in monolithic APUs (these are balanced in reverse, more for graphics and less for processor performance).

Source: by

*The article has been translated based on the content of by If there is any problem regarding the content, copyright, please leave a report below the article. We will try to process as quickly as possible to protect the rights of the author. Thank you very much!

*We just want readers to access information more quickly and easily with other multilingual content, instead of information only available in a certain language.

*We always respect the copyright of the content of the author and always include the original link of the source article.If the author disagrees, just leave the report below the article, the article will be edited or deleted at the request of the author. Thanks very much! Best regards!