With smaller and smaller steps, the miniaturization of semiconductor manufacturing processes is still continuing, the next “station” towards the limits of conventional physics being the 4nm node, immediately following the 5nm one currently used.
AMD has already set the tone for the industry by demonstrating a prototype version of the Ryzen 5900X processor, which doubles the L3 cache by attaching an additional silicone “pill” just below that of the main processor. The technology is not exactly new, it has existed for many years under the name HBM, being also used by AMD to attach RAM in the package of state-of-the-art graphics accelerators.
For now, the transition to the 4nm manufacturing process will not bring major leaps in performance, compared to current 5nm technology. The real goal is the manufacturing node on 3nm and even 2nm, located at the limit of the possibilities offered by the conventional laws of physics. Furthermore, the leaps in performance and efficiency will have to be achieved through other means, such as microprocessor architecture improvements and other costly innovations, such as the one described above.
Returning to the Snapdragon 895 / Exynos 2200 duo, none of them yet receive concrete performance indicators. We only know that TSMC is just one of the big players in the industry, the Qualcomm manufacturer paying Samsung no less than $ 850 million to manufacture the Snapdragon 888 chipset, after TSMC declined the offer using as justification the fully contracted production capacity.
Owner of the most advanced methods TSMC is not automatically the best choice for microprocessor manufacturing, with high-end customers such as Samsung having at most access to contracting small volumes called ‘risky production’, involving the supply of microprocessors made using the most recently available manufacturing node, regardless of the actual costs involved.
Source: Go4IT by www.go4it.ro.
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