AMD’s marketing probably doesn’t bother much. In the trailers for the Accelerated Data Center Premiere, AMD dropped the “GPU” designation in connection with the Instinct series and used the designation accelerator exclusively. But then, with the launch of the Instinct MI250X, it was the first chiplet GPU to be introduced. Either AMD’s marketing department doesn’t bother too much about what the product will actually say, or I may just misunderstand the situation and the term “accelerator” means the whole OAM module, while the GPU in this context is a silicon case.
Lisa Su picked up a real piece of hardware on stage, but the camera shot from a distance erased all the details. The published graphics then contained only renders. Now we have the opportunity to look at the first (slightly more detailed) photos of the dual GPU Aldebaran and the Instinct MI250X accelerator (perhaps that’s the right thing to do).
Many have tried to derive the dimensions of the chipsets, but the problem is that the HBM2E used has different dimensions than the classic HBM2 (they are slightly more square) and these dimensions are not stated by the manufacturers or other sources. Anyone who compared the dimensions of the classic HBM2 got to house numbers. If we want to get at least a rough picture of the area of silicon, we can only come out of the pitch of the screws for the OAM module (that the inner quartet corresponds to 102 × 90 mm), from which we use the introductory photo to calculate an area of about 742 mm² for silicon. This value can theoretically be slightly exaggerated. The photo is taken with a relatively wide focus that enhances perspective, so the fact that silicon is closer to the photosensor than the screw holes can cause it to be captured as slightly larger than it actually is. But we are probably somewhere around 700 mm², ie about 1400 mm² 6nm of silicon in total.
|architecture||GCN 4||CDNA||CDNA 2||CDNA 3||Ampere|
|format||PCIe||PCIe||OAM||OAM||SXM4 / PCIe|
|CU / SM||60||120||220|
|You have. Colors||–||?||880||?||432|
|rate||1800 MHz||1502 MHz||≤1700 MHz||?||1410 MHz|
|↓↓↓ T(FL)OPS ↓↓↓|
|↑↑↑ T(FL)OPS ↑↑↑|
|32 GB||32 GB||128 GB||?||40 GB|
|HBM2||2,0 GHz||2,4 GHz||3,2 GHz||HBM3?||2,43 GHz|
|1024 GB/s||1229 GB/s||3277 GB/s||?||1555 GB/s|
|TDP||300 W||300 W||500W|
|~600W?||400 / 250 W|
|transistorů||13.2 billion||50 billion|
|58.2 billion||?||54.2 billion|
|GPU area||331 mm²||750 mm²||2× ≤742mm²||?||826 mm²|
|process||7 nm||7 nm||6nm||?||7 nm|
Although Aldebaran created de facto tailor-made for AMD to win a contract for a Frontier supercomputer, the company already has another order. She won a contract for the Adastra supercomputer, which is building HPE for France. Although it is not an EFLOPS system, with the planned 70 PFLOPS it will still be one of the most powerful solutions in Europe. It is formed in two waves. The first HPE will build on the 3rd generation of Epycu (Milan / Zen 3) and Instinct MI250X accelerators. The second will be completed later and will be based on the Epics Genoa (Zen 4) planned for 2022.
In this context, AMD did not dare to point out that the number of systems with its hardware in the Top500 ranked approximately threefold year-on-year, namely to 73 systems. Of the top ten, it powers four, which is the most of all processor manufacturers and 2x more than the second processor manufacturer behind AMD. 8 months after the release of the 3rd generation Epyc (Milan), this processor already powers 17 of the 73 supercomputers built on AMD hardware.
Source: Diit.cz by diit.cz.
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